diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile
index 12a92ae..feecf4c 100644
--- a/board/freescale/mpc8610hpcd/Makefile
+++ b/board/freescale/mpc8610hpcd/Makefile
@@ -29,7 +29,7 @@
 
 SOBJS	:= init.o
 
-COBJS	:= $(BOARD).o
+COBJS	:= $(BOARD).o law.o
 
 COBJS-${CONFIG_FSL_DIU_FB}	+= mpc8610hpcd_diu.o
 
diff --git a/board/freescale/mpc8610hpcd/law.c b/board/freescale/mpc8610hpcd/law.c
new file mode 100644
index 0000000..b4d222d
--- /dev/null
+++ b/board/freescale/mpc8610hpcd/law.c
@@ -0,0 +1,44 @@
+/*
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fsl_law.h>
+#include <asm/mmu.h>
+
+struct law_entry law_table[] = {
+#if !defined(CONFIG_SPD_EEPROM)
+	SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR_1),
+#endif
+	SET_LAW_ENTRY(2, CFG_PCIE1_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1),
+	SET_LAW_ENTRY(3, CFG_PCIE2_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2),
+	SET_LAW_ENTRY(4, PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC),
+	SET_LAW_ENTRY(5, CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1),
+	SET_LAW_ENTRY(6, CFG_PCIE2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_2),
+	SET_LAW_ENTRY(7, CFG_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
+	SET_LAW_ENTRY(8, CFG_PCI1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI_1),
+	SET_LAW_ENTRY(9, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_1)
+};
+
+int num_law_entries = ARRAY_SIZE(law_table);